The air interface specification for many CDMA transceivers can be quite complex. Most currently available Digital Signal Processors (DSP) either consume too much power, or they do not have enough correlation capacity for chip level processing. This is especially important for battery powered devices, since the power consumed directly relates to the battery life and frequency of charging or battery replacement. As the requirements for more and more processing power increase, this problem is compounded. This is especially true for high frequencies of operation dictated by high data rates, such as those specified for the third generation (3G) and beyond for CDMA, where these issues present significant obstacles to designers.